The present invention relates to a periodic signal controller for generating a periodic AC output signal synchronized with a periodic AC input signal and a frequency detection device suitable for use in the periodic signal controller. More specifically, the invention relates to a periodic signal controller that can synchronize or unsynchronize the AC output signal with the AC input signal at a frequency variation rate not exceeding a fixed frequency variation rate.
For control over inverters in uninterruptible power supply devices or the like, a technique for generating an AC output signal synchronized with an AC input signal is employed. As described in ‘PLL (Phase-Locked Loop) Applied Circuit’ by Takeshi Yanagisawa, pp. 28-36, for example, the periodic signal controller of a so-called digital phase-locked loop type is known. In this device, the AC input signal is pulsed by a zero-cross comparator, and pulse width comparison is made by a counter, thereby detecting a phase difference between the AC input and output signals and a frequency of the AC output signal. Then, the AC output signal synchronized with the AC input signal is output. In the “PLL Applied Circuit”, pp. 5-26 also discloses the periodic signal controller of an analog PLL type. In this device, a phase difference between AC input and output signals is determined from a product of the AC input signal by the AC output signal. Then, the frequency of an AC output voltage is determined from a signal indicating this phase difference, so that the AC output voltage synchronized with the AC input signal is output.
Japanese Patent No. 3235651 discloses the periodic signal controller of the PLL type with its frequency variation rate not exceeding a fixed value. The technique described in the Japanese Patent No. 3235651 constitutes a PLL structure based on the frequency detection device described in Japanese Patent No. 30530002. This PLL structure has following features:
1) The PLL structure is of a two-stage analog PLL structure. In a first-stage PLL, a frequency difference between an AC input signal and a reference frequency is determined. The frequency difference is not between the AC input signal and an AC output signal. This frequency difference is determined from an integral element output under a proportional-integral (PI) control. Since the frequency difference is determined from the integral element output, instantaneous frequency values are not processed.
2) The frequency variation rate is set by inputting a frequency difference detection signal indicating this frequency difference to a second-stage PLL and then passing the signal through a limiter. When the frequency of the AC input signal has varied during synchronization, the signal indicating the frequency difference between the AC input signal and the reference frequency is input to the second-stage PLL, so that the AC output signal follows the AC input signal at the frequency variation rate not exceeding the fixed frequency variation rate.
In the periodic signal controller of the digital PLL type, the zero-cross comparator is employed. Thus, the device is greatly vulnerable to noise near zero cross points. When this periodic signal controller of the digital PLL type is employed for the uninterruptible power supply device, the periodic signal controller often malfunctions in an environment with comparatively poor quality of power. On the other hand, the periodic signal controller of the analog PLL type is comparatively immune to noise or is not readily affected by noise, because the controller uses analog signal values. However, designing the controller to achieve a high gain is difficult. Further, it was difficult to readily set the frequency variation rate.
In the technique using the PLLs, described in the Japanese Patent No. 3235651, the periodic signal controller is comparatively immune to noise and can readily set the frequency variation rate. However, this controller has following problems:
1) Since the frequency difference detection signal is determined from the output under the PI control, it took much time for the periodic signal controller to be brought to a steady state. For this reason, it also took much time until the periodic signal controller became able to start to attain synchronization.
2) If a harmonic voltage was included in the AC input voltage, the controller was sometimes affected by the harmonic voltage.
3) Since an instantaneous frequency difference detection signal indicating an instantaneous input and output frequency difference was not determined, there were some points at which attaining synchronization was difficult.    Further, for detection of frequency anomaly or undesirable frequency variation, when the periodic signal controller of the analog PLL type was employed, an additional frequency anomaly detection circuit had to be provided, in addition to the periodic signal controller. Moreover, in the periodic signal controller of the two-stage analog PLL structure, it takes much time for the controller to be brought into the steady state. In addition, if the harmonic voltage was included in the AC input signal, a result of frequency anomaly detection was sometimes affected.